1. Field of the Disclosure
The disclosure relates generally to methods for scheduling applications on a multi-core processor.
2. General Background
The advent of faster and more capable processors has resulted in the development of operating systems features that permit previously independent applications running on completely independent processors to be ported to an operating environment where the independent applications share a processor. Separation and scheduling mechanisms have been defined and fielded that support simultaneous hosting of multiple applications on a single-core processor. Previous scheduling mechanisms have included priority based schedulers, time-partitioning schedulers, cooperative schedulers, and many other schedulers, including schedulers that combine techniques. Each scheduling mechanism has capabilities that are beneficial to some uses but include tradeoffs for other uses.
Additional processor capabilities in terms of supporting multiple computing cores (i.e., multi-core) within a single processor, are increasingly becoming standard, with more cores seemingly being integrated with each passing revision. A multi-core processor is an integrated electronic device that contains two or more independent processing elements (i.e., cores, with or without dedicated caches) on which execution sequences can simultaneously execute. These cores are interconnected with each other and the remaining system resources (e.g., data memory, program memory, hardware devices) through hardware capabilities provided by the multi-core processor. The composite execution capabilities of the multi-core platform should mean that there is sufficient bandwidth to add new applications (or extend existing applications) in the future, provided the scheduling mechanism includes sufficient support to preserve unallocated processor core resources and sufficient granularity to allocate those resources, independent of which core contains unallocated resources.
Several general multi-core usage paradigms have been developed, including: (1) Asymmetric Multi Processing (AMP), where each core runs a completely independent executable; (2) Symmetric Multi Processing (SMP), where an executable is designed to make use of multiple cores simultaneously; (3) Combinations of both (some cores used for AMP, other cores used for SMP).
The rigidness of these usage paradigms is highlighted when additional applications are attempted to be added to a multi-core processor based platform. A typical implementation, during initialization, may associate a core or set of cores with an application or group of applications. For example, elemental associations (processor sets) used for scheduling may be defined, such that there may be an association of processor cores within the processor sets. However, processor cores in such applications are not shared between processor sets. While any unallocated core can be utilized for new applications (or to extend an existing application), a new application cannot be defined that utilizes spare capacity on cores assigned to different processor sets. Other implementations may not associate cores with any application. For example, elemental associations (scheduling domains) used for scheduling may be defined, such that there is intentionally no association of a processor core within the scheduling domain. As such, in such implementations, preservation of core resources is not enforced (e.g., all available processor core capabilities may be utilized, including capabilities intended to be preserved for future use or capabilities not intentionally used due to application programming errors).
Accordingly, it is desirable to address the limitations in the art.